The present invention relates to phase lock loops in communication systems and improved methods for maintaining synchronization between a transmitter and a receiver. More specifically, a novel system and method is disclosed which incorporates an outlier rejection filter and a synchronization loss detector with the phase lock loop to thereby maintain the integrity of the phase lock loop during reception at the receiver of corrupted signals from the transmitter that is communicating with the receiver and/or when the receiver receives spurious signals from sources other than the intended transmitter. Corrupted signals from the transmitter and spurious signals from either the transmitter in the communication system or signals from sources other than the transmitter in the communication system, such as a jammer, are referred to herein as, individually and collectively, “outliers”.
Generally, the inventive system and method maintains synchronization in a communication system in which a communication signal comprising a carrier and a data signal is sent from a transmitter to a receiver which includes a phase lock loop. The receiver compares the output of a Viterbi decoder with the output of a quick decision circuit. The Viterbi decoder, which incorporates traceback, determines the minimum aggregate Euclidean distance for multiple symbols. The quick decision circuit determines the minimum Euclidean distance for a single symbol without decoding the symbol. A delay circuit is placed in series with the quick decision circuit to compensate for the traceback delay in the Viterbi decoder. If the difference in the output signals of the Viterbi decoder and the quick decision circuit is greater than a predetermined threshold, thereby indicating that the communication signal received is an outlier, the phase error signal in the phase lock loop is prevented from updating the phase lock loop filter.
A typical prior art fast acquisition phase lock loop includes a reference oscillator, a mixer, and a filter. The filter is typically a fixed bandwidth filter. Fixed bandwidth filters have several disadvantages when used in a phase lock loop. When the receiver is not in phase lock, a fixed filter bandwidth limits the speed with which phase lock can be achieved. When attempting to achieve phase lock, a wide bandwidth is preferred so as to increase the speed of acquisition of phase lock since a wider bandwidth is more likely to encompass the frequency of the received communication signal. Once phase lock is achieved, a narrow bandwidth is preferred so as to reduce the noise in the output signal of the phase lock loop. Therefore, it is advantageous to incorporate a dynamic bandwidth filter in the phase lock loop. However, even the use of a dynamic filter in the phase lock loop will not overcome the degradation caused by the reception and processing of an outlier signal. The present invention's use of an outlier rejection filter and synchronization loss detector overcomes the problems inherent with the reception and processing of outlier signals, whether a fixed bandwidth filter or a dynamic bandwidth filter is used in the phase lock loop.
Additionally, the output signal from the Viterbi decoder is used to extract the carrier from the received communication signal by use of a lookup table to generate phase angle information as a function of the Viterbi decoder output signal. The phase angle information is combined with the Viterbi decoder output signal to reconstitute the data signal in the communication signal. The reconstituted data signal is combined with the communication signal, which has been delayed to compensate for the traceback delay in the Viterbi decoder, in order to extract the carrier. It is to be understood that the use of a look-up table is but one way to generate phase angle information and other methods of generating phase angle information, such as computing the phase angle from previously known or contemporaneously received parameters and/or measurements, determining the angle information of the received signal prior to sending the signal to the Viterbi decoder and storing the angle information for combining with the output signal from the Viterbi decoder, etc., are contemplated by the invention.
Receivers with phase lock loops are well known in the art. Typical prior art phase lock loops, such as a Costas loop for example, typically include a complex mixer which compensates for phase and frequency offsets between the received communication signal and the phase and frequency of a signal generated by a local voltage controlled oscillator (“VCO”). Prior art phase lock loops may also include a quick decision circuit to extract the data signal from a communication signal, a mixer to combine the data signal with the communication signal to extract the carrier wave, a phase detector to determine the phase error between the carrier and a reference signal, a phase loop filter which generates a signal responsive to the phase error in order to control the output signal of the VCO being applied to the complex mixer.
The prior art phase lock loop is susceptible to degraded operation due to the reception of outlier signals and the processing of those outlier signals as intended communication signals. For example, if the receiver receives a corrupted signal from the intended transmitter, the phase lock loop determines the phase error of the corrupted signal as if the corrupted signal were an intended communication signal, i.e., as if the corrupted signal included data to be communicated from the transmitter to the receiver. The communication signal from the transmitter can be corrupted by any means that normally corrupt a signal, such as loss or synchronization, reception of a multipath component of the communication signal, low signal to noise ratio, etc. Likewise, if a spurious signal is received by the receiver, the phase lock loop determines the phase error of the spurious signal.
The phase error of an outlier signal, when applied to the phase loop filter, degrades the operation of the phase lock loop by inserting information into the phase loop filter that does not correspond to an actual communication signal. Therefore, the phase loop filter will send control signals to the VCO that will cause the VCO to send signals to the complex mixer that will, in turn, increase the difference between the phase and/or frequency of the VCO signal and the phase and/or frequency of the received communication signal. Consequently, the phase lock loop will no longer track the received communication signal and the signal will be lost, necessitating reacquisition of the signal.
Additionally, typical VCOs used in the industry are expensive, do not track the received communication signal well, and/or require a lot of power to operate. The poor operation of VCOs results in the loss of the communication signal or result in dithering about the phase and frequency of the received communication signal thereby increasing the receiver's power requirements. In receivers that operate with a small power source, such as handheld receivers, the power drain associated with an inexpensive VCO is undesirable. Expensive VCOs are also undesirable as the cost of the overall receiver is increased.
Thus there is a need for an improved phase lock loop to overcome the limitations of the prior art by minimizing degradation in the operation of the phase lock loop caused by the reception of outlier signals and to do so at an affordable cost. Additionally, there is a need for a phase lock loop that operates without a voltage controlled oscillator.
One embodiment of the present invention avoids the problems of the prior art by including an outlier rejection filter and a synchronization loss (“sync loss”) detector to control the operation of the phase lock loop and prevent the degradation of the phase lock loop due to the reception of outlier signals.
Accordingly, it is an object of the present invention to obviate many of the above problems in the prior art and to provide a novel phase lock loop system and method.
It is another object of the present invention to provide a novel system and method for maintaining the integrity of a phase lock loop by incorporating an outlier rejection filter and a synchronization loss detector with the phase lock loop.
It is yet another object of the present invention to provide a novel system and method for operating a phase lock loop without a voltage controlled oscillator.
It is still another object of the present invention to provide a novel system and method for reducing noise in a fast acquisition phase lock loop.
It is a further object of the present invention to provide a novel system and method for maintaining phase lock by changing the bandwidth of the phase loop filter as a function of the difference between the output signals of a quick decision circuit and a Viterbi decoder.
These and many other objects and advantages of the present invention will be readily apparent to one skilled in the art to which the invention pertains from a perusal of the claims, the appended drawings, and the following detailed description of the preferred embodiments.